One prior nonvolatile semiconductor memory is the flash electrically erasable programmable read-only memory ("flash"). Flash memories are programmed electrically and, once programmed, retain their data until erased. After erasure, flash memories can be programmed with new code or data.
Flash memories differ from conventional electrically erasable programmable read-only memories ("EEPROM") with respect to erasure. Conventional EEPROMs typically use a select transistor for individual byte erasure control. Flash memories, on the other hand, typically achieve much higher densities using single transistor cells. Some prior flash memories are erased by applying a high voltage to the sources of every memory cell in the memory array simultaneously. This results in the full array erasure.
Flash memory conventions define a logical one as a state where few, if any, electrons are stored on the floating gate of a memory cell. Convention also defines a logical zero as the state where many electrons are stored on the floating gate of the memory cell. Erasure of the flash memory causes a logical one to be stored in each bit cell. Flash memory cells cannot be overwritten individually from a logical zero to a logical one without prior erasure. A flash memory cell can be overwritten individually from a logical one to a logical zero, however, because this entails simply adding the intrinsic number of electrons associated with the erased state to a floating gate.
The process for erasure, programming and verification of flash memories requires careful control of the voltages used to perform those steps. For example, one prior art flash memory is the 28F008 complimentary metal oxide semiconductor ("CMOS") flash memory sold by Intel Corporation of Santa Clara, Calif., which is an 8 megabit flash memory. The flash memory includes a command register to manage electrical erasure and reprogramming. Commands for programming and erasure are written to the command register from a controlling microprocessor using standard microprocessor write timings. The command register contents serve as input to an internal state machine that controls erasure and programming circuitry.
Typically, only one operation can be performed at a time within a flash memory. This means that a high priority command must await completion of a low priority command that was issued before the high priority command. For example, erase commands are time consuming and fairly low priority. In contrast, program commands can be executed fairly quickly and are of a higher priority than erase commands. Nonetheless, in prior flash memories, once execution of an erase command has begun the execution of a program command is delayed because it cannot be accepted until after complete execution of the erase command.